84 lines
1.6 KiB
Plaintext
84 lines
1.6 KiB
Plaintext
{
|
|
"board": {
|
|
"design_settings": {
|
|
"defaults": {
|
|
"apply_defaults_to_fp_fields": false,
|
|
"apply_defaults_to_new_footprints": false
|
|
}
|
|
}
|
|
},
|
|
"boards": [],
|
|
"cvpcb": {
|
|
"equivalence_files": []
|
|
},
|
|
"erc": {
|
|
"erc_exclusions": [],
|
|
"meta": {
|
|
"version": 0
|
|
}
|
|
},
|
|
"libraries": {
|
|
"pinned_footprint_libs": [],
|
|
"pinned_symbol_libs": []
|
|
},
|
|
"meta": {
|
|
"filename": "loop-detector.kicad_pro",
|
|
"version": 1
|
|
},
|
|
"net_settings": {
|
|
"classes": [
|
|
{
|
|
"bus_width": 12,
|
|
"clearance": 0.2,
|
|
"diff_pair_gap": 0.25,
|
|
"diff_pair_via_gap": 0.25,
|
|
"diff_pair_width": 0.2,
|
|
"line_style": 0,
|
|
"microvia_diameter": 0.3,
|
|
"microvia_drill": 0.1,
|
|
"name": "Default",
|
|
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
|
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
|
"track_width": 0.25,
|
|
"via_diameter": 0.8,
|
|
"via_drill": 0.4,
|
|
"wire_width": 6
|
|
}
|
|
],
|
|
"meta": {
|
|
"version": 3
|
|
},
|
|
"net_colors": null,
|
|
"netclass_assignments": null,
|
|
"netclass_patterns": []
|
|
},
|
|
"pcbnew": {
|
|
"last_paths": {
|
|
"gencad": "",
|
|
"netlist": "",
|
|
"plot": "",
|
|
"pos": "",
|
|
"specctra_dsn": "",
|
|
"step": "",
|
|
"svg": "",
|
|
"vrml": ""
|
|
},
|
|
"page_layout_descr_file": ""
|
|
},
|
|
"schematic": {
|
|
"legacy_lib_dir": "",
|
|
"legacy_lib_list": [],
|
|
"meta": {
|
|
"version": 1
|
|
},
|
|
"page_layout_descr_file": ""
|
|
},
|
|
"sheets": [
|
|
[
|
|
"aaaaaaaa-aaaa-aaaa-aaaa-aaaaaaaaaaaa",
|
|
"Root"
|
|
]
|
|
],
|
|
"text_variables": {}
|
|
}
|